Senior Embedded Systems Integration & Test Engineer

Space is a critical domain, connecting our technologies, our security and our humanity. While others view space as a destination, we see it as a realm of possibilities, where we can do more we can innovate, invest, inspire and integrate our capabilities to transform the future.

At Lockheed Martin Space, we aim to harness the full potential of space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve. Were creating future-ready solutions, focusing on resiliency and urgency through our 21st Century Security vision. Were erasing boundaries and forming partnerships across industries and around the world. Were advancing spacecraft and the workforce to fuel the next generation. And were reimagining how space can connect us, ensuring security and prosperity.

Join us in shaping a new era in space and find a career that's built for you.

The Senior Embedded Systems Integration & Test Engineer will lead and execute endtoend integration, verification, and validation activities for the D5LE2 Missile TMK2 Package Level Requirements. The role encompasses brassboard prototyping, configuration management, testplan development, testmethod definition, and coordination with EGSE/ESE/TMK2 teams to ensure successful delivery of hardwaresoftware interfaces, test documentation, and baseline verification approaches.

Core Responsibilities:

Prototyping & Support
Provide ESElevel brassboard design and rapidprototype support.
Translate prototype findings into configurationmanagement updates.
Configuration Management (CM)
Manage document approvals, review cycles, and secure vaulting of all CM artifacts.

Test Program Planning
Initialize, draft, review, and finalize the D5LE2 TMK2 Integration Test Program Plan (Volume2).
Develop, document, and vault TMK2 package test plans for Engineering Development Units (EDU).

Test Objective Definition
Lead creation of CDRL testobjective documents from concept through approval and vaulting.

Test Methodology & VCRM
Determine and update test methods based on development test results.
Draft, review, approve, and baseline Package Level Weapon Specification Verification, Configuration & Requirements Management (VCRM) approaches.

EGSE/ESE Coordination
Plan and coordinate ATR integration into EGSE test consoles.
Decompose Package Level Weapon Specification ATRs into discrete interfaces; produce and review final interface & test documentation for EGSE.

Subsystem HAL Initiation
Initiate and define the Hardware Allocation List (HAL) architecture for the subsystem, establishing baseline specifications and integration pathways.

Leadership & Communication
Facilitate crossfunctional reviews, orchestrate stakeholder approvals, and maintain traceability throughout the program lifecycle.
Mentor junior engineers on CM practices, testplan development, and prototype support. Bachelors degree in Electrical Engineering, Systems Engineering, Aerospace Engineering, or a related STEM field.

Minimum 3 years of experience in systems integration, test & evaluation, or hardware prototyping for aerospace/defense programs.

Active Secret clearance or recently held Secret clearance. Ability to obtain and maintain a U.S. DoD Top Secret clearance (or higher).

Strong written and verbal communication skills; proficiency preparing technical documentation, test plans, and review packages.

Ability to work in classified environments.

Ability to work onsite full time. Bachelors degree in Electrical Engineering, Systems Engineering, Aerospace Engineering, or a related STEM field.

Handson experience with brassboard/PCB prototyping and rapidhardware development.

Proficiency in configurationmanagement tools (e.g., CM2, JIRA, DOORS, or similar).

Familiarity with missile/weapon system integration testing and TMK/TIM processes.

Experience drafting and baselining testobjective documents (CDRLs).

Ability to develop and execute integration test program plans (vol.1/2) for complex weapon systems.

Knowledge of EGSE/ESE testconsole environments and ATR integration.

Understanding of Hardware Abstraction Layer (HAL) design and implementation.

Experience with VCRM (Verification, Configuration, Requirements Management) methodologies.

Familiarity with MILSTD498/IEEE828 or equivalent configurationmanagement standards.

CAD/ECAD tools (Altium, Mentor, Cadence).

Modeling & simulation (MATLAB/Simulink, ANSYS).
Leadership

Proven ability to lead multidisciplinary review boards and mentor junior staff.

Demonstrated projectmanagement competence (schedule, risk, and deliverable tracking).